We chose Imperas and the Open Virtual Platform technology because of the quality of the models and technology. We see the positive momentum and leadership position of OVP, and believe this is the best technology for instruction accurate simulation of processor core models.
Rick O’Connor, President & CEO
OpenHW Group
The open RISC-V ISA specification is an excellent starting point and open-source processor IP cores, such as the CORE-V family, have real potential to change the industry.
The high-quality open-source CORE-V CV32E40P core now allows the broadest participation in the RISC-V revolution, the OpenHW MCU Dev/Kit project is just one example of the innovations that can now be developed from the quality foundation provided by the CV32E40P core, having been verified with the CORE-V-VERIF testbench which leverages the Imperas RISC-V golden reference model.