The open ISA of RISC-V is enabling a new wave of processor design innovation across the spectrum of compute requirements in almost all market segments.
High quality processor verification is not a simple task, but the ease of use and configurable approach with RVVI offered by ImperasDV enables the eSOL TRINITY team to support the expert design teams at NSITEXE and other leading adopters of RISC-V in Japan.
Manuel Andreu, Team Lead for Software Development
Solectrix GmbH
We were able to easily merge the Imperas simulator into our automated workflow on our build server for both unit and integration testing. Running our tests with the production binaries on the simulator enabled us to find bugs that were not found when the software was cross compiled to the x86 Windows environment.