New design innovations with RISC-V offer great potential in automotive applications, but achieving the extensive quality standards are critical for success.
The verification requirements to achieve the ASIL D safety requirement level of ISO 26262 with a processor-based design are extensive, however verification IP reuse through standards such as RVVI help improve efficiency and achieve time to market schedules with all the design innovations that RISC-V enables.
Róisín O’Keeffe, VP Global Business Development
Ashling Microsystems
Ashling takes great care in the integration and combinations of technologies for our tools to support software developers. The Imperas riscvOVPsimCOREV reference simulator provides the foundational reference that CORE-V IDE’s can be based on.