Comments
David Kelf, CEO
Breker Verification SystemsRISC-V represents an inflection point for semiconductor verification as the design freedoms provided by the open ISA means an assumption of the responsibility of the processor and system verification task.
In partnering with Imperas, the leaders in RISC-V processor verification, we can offer a combination of technologies and interface standards for IP and SoC testing that ensures commercial grade verification for these flexible devices right through to the end platform.
Hermann Haslauer, Head of Embedded Software Support Engineering
Palfinger Europe GmbHPalfinger is the global leader for innovative crane and lifting solutions.
As our embedded development teams develop and implement our roadmap for digitalization and artificial intelligence, the need for software quality testing has never been greater. The TESSY tool together with the Imperas virtual platform simulators and OVP models of Arm processors, are a quality combination that we use as a foundation of our software test and maintenance process.