Imperas virtual platform solutions and tools help in the early phase of SoC and software development, UltraSoC embedded analytics enables hardware-based debug, development and testing. The combination of hardware and simulation solutions will help our mutual customers design the next generation of complex SoCs.
Allen Baum, Chair of the RISC-V International Architecture Test SIG
Esperanto Technologies, Inc.
A key part of the RISC-V privilege specification that is fundamental for OS and application security is the PMP feature.
Enabling its correct operation is essential for security applications, and the Imperas PMP test suites are a valuable contribution to the RISC-V compatibility and verification community.