As the MIPS design and verification teams transition to RISC-V, we see a lot of benefits from adopting the open ISA specification.
As an IP company, we have a significant focus on the quality and verification of our processor IP deliverables. Imperas are the leaders in RISC-V simulation and verification and, with more than a decade of collaboration, they are the obvious DV partner for MIPS and its new RISC-V offerings.
Duncan Graham
University Program Manager, Imperas Software
The Imperas University Program encourages participation in the embedded systems community in three ways: use on research projects, use in the classroom, and sharing of virtual platform models through the Open Virtual Platforms (OVP) Library.