Comments
Philippe Luc, Verification Director
CodasipImperas are the pioneers in simulation technology and processor verification for RISC-V.
While processor verification is not a new problem, there are many RISC-V suppliers, with customization and various levels of verification or conformance: customers are legitimately concerned about both quality and fragmentation. Codasip is very proud of our rigorous approach to verification– using Imperas as an important part of our quality process furthers extend our differentiation. The Imperas independence, reputation and technical strength provides our customers with further reassurance in our ‘best in class’ RISC-V processors.
Frankwell Jyh-Ming Lin, President
Andes TechnologyTo support the ever-increasing features of the emerging applications, SoC engineers face the challenges of the design complexity and time-to-market. They need powerful development tools such as fast system simulation for architectural exploration and SW development, emulation for functional verification and system validation, performance optimization, tough bugs tracing and embedded analytics. That is why Andes has worked with some of the partners on V3 AndesCore processors for many years. We are now collaborating with Imperas, Lauterbach, Mentor, and UltraSoC to provide those advanced development tools for our new V5 AndesCore N25 and NX25, and the RISC-V community.