OFFIS - Institute for Information Technology of Germany
OVP was selected because of the ease with which models are built and the flexibility in interfacing to other tools. The availability of the ARM processor model we needed, and the open source nature of the OVP models, were also important factors.
Don Smith, Vice President Engineering
MIPS, Inc.
At MIPS we are experienced in bringing advanced computing technology, such as hardware multi-threading, to market as applications-class processors.
As part of the strategic move to RISC-V, we fully appreciate the needs, implications and requirements for a high-quality verification solution. The Imperas Reference Model enables lock-step-compare with asynchronous events which is the foundation of our SystemVerilog testbench and verification methodology.