The OpenHW Group charter is to deliver high quality processor IP cores for our leading commercial members and open source community adoption.
Central to this goal, the OpenHW Verification Task Group developed and published a DV test plan and implemented an open engineering-in-progress approach as we complete the verification tasks using the Imperas golden RISC-V reference model.
Hugh O’Keeffe, CEO
Ashling
We are excited to offer our customers target debug support for the Imperas golden reference models of the MIPS eVocore P8700 Multiprocessor.
This collaboration between Ashling, MIPS, and Imperas enables developers to accelerate their RISC-V software development, testing, and debugging, ultimately leading to faster time-to-market for next-generation domain-specific devices.