SoC projects are all about partnerships; hardware and software engineers working together, with a complete ecosystem of supporters.
With this Imperas collaboration, our mutual customers will benefit from the availability of SiFive qualified models that are compatible with the mainstream EDA tool flows.
Itai Yarom, VP of Sales and Marketing
MIPS, Inc.
RISC-V is at the forefront of a hardware design renaissance in optimized processors.
But, an ISA only provides the envelope of possibilities. The art and science of processor optimization requires complete feature exploration and verification, which are supported by the reference model simulation and verification technology from Imperas.