Charlie Hong-Men Su, CTO and Senior Vice President
Andes Technology Corp
In commercial semiconductor IP, quality is perhaps the highest priority for successful customer engagements, the extensive test and verification process is best achieved with extensive simulator-based testing. We have already certified the Imperas RISC-V model and simulation technology for Andes N25 and NX25 processors so expect that riscvOVPsim will quickly be adopted as an industry standard reference simulator.
Philippe Berger, CEO
Dolphin Design
Our verification methodology for the Panther DSP/AI Accelerator IP needs to address not just the full range of the current configuration options but also the roadmap for Panther.
ImperasDV is the cornerstone of our simulation-based DV strategy, with the Imperas golden reference model, scoreboard, verification IP, functional coverage analysis and debug efficiency.