The free and open nature of the RISC-V ISA fosters unprecedented levels of processor innovation. To harness this design freedom, the ecosystem requires robust development tools and the assurance that verification test benches can be developed and validated on supplier-neutral platforms. Imperas’ new riscvOVPsim is an important suite of tools that addresses this challenge.
Charlie Hong-Men Su, CTO
Andes Technology
Imperas virtual platform solutions and open-source models help accelerate embedded software development, debug and test for our customers. This certification demonstrates our great confidence in the accuracy and value of Imperas support for V5 AndesCore N25 and NX25 processors reference models and simulators for use by our customers, partners, and ecosystem