Processor verification is challenging, and yet critical to RISC-V adoption.
ImperasDV is the first commercially available RISC-V processor verification solution, and the achievement of the tight integration with Cadence is key to the successful use of ImperasDV by NSITEXE.
Bill McSpadden, Principal VLSI Verification Engineer
Seagate Technology
The Golden RISC-V Reference Model was used as the “go/no-go” model to determine the RTL correct behavior with any discrepancies, bugs or issues with the design, tests, specifications, or test bench.