As RISC-V adoption grows throughout the industry in a variety of application areas, so does the need for robust simulation support from both commercial and open source suppliers. We welcome Imperas' contributions to the rapidly accelerating RISC-V ecosystem.

In commercial semiconductor IP, quality is perhaps the highest priority for successful customer engagements, the extensive test and verification process is best achieved with extensive simulator-based testing. We have already certified the Imperas RISC-V model and simulation technology for Andes N25 and NX25 processors so expect that riscvOVPsim will quickly be adopted as an industry standard reference simulator.

The free and open nature of the RISC-V ISA fosters unprecedented levels of processor innovation. To harness this design freedom, the ecosystem requires robust development tools and the assurance that verification test benches can be developed and validated on supplier-neutral platforms. Imperas’ new riscvOVPsim is an important suite of tools that addresses this challenge.

Imperas virtual platform solutions and open-source models help accelerate embedded software development, debug and test for our customers. This certification demonstrates our great confidence in the accuracy and value of Imperas support for V5 AndesCore N25 and NX25 processors reference models and simulators for use by our customers, partners, and ecosystem

Imperas virtual platform solutions and tools help in the early phase of SoC and software development, UltraSoC embedded analytics enables hardware-based debug, development and testing. The combination of hardware and simulation solutions will help our mutual customers design the next generation of complex SoCs.