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It’s great to be partnering with the leader in processor models and virtual platforms for embedded software development.

The Imperas release of the first commercial simulator that can boot Linux on a RISC-V ISS model represents a significant milestone in the evolution of processors based on the RISC-V RV64GC ISA.A key element of the RISC-V ecosystem is a robust, commercial virtual software development environment and Imperas has delivered on this promise.

Building out the Mi-V RISC-V ecosystem with the Imperas Extendable Platform Kit (EPK™) is a vital piece of our ecosystem offering as we continue to expand this program and enhance our ability to deliver innovative solutions for customers. The Imperas EPK allows for rapid software development and debugging of corner cases when using Mi-V soft CPUs on Microsemi field programmable gate array (FPGA) products.

The Imperas virtual platform solutions for software development, debug and test, along with their open-source models, comprise an excellent methodology for development of embedded software for SoCs based on V5 AndesCore N25 and NX25 RISC-V processors.

A healthy RISC-V ecosystem is critical to the adoption of RISC-V processors. The open RISC-V ISA specifications make it easier for ecosystem companies like Imperas and Andes to collaborate.  Tools such as the Imperas RISC-V models, virtual platforms and software solutions will improve time to market by enabling faster software development, simplifying debug and test, lowering costs and risks and delivering overall increased quality.

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