As a developer of leading high-performance RISC-V application processors, verification standards are an important companion to the RISC-V specifications.
Verification standards such as RVVI provide a solid foundation that supports all RISC-V adopters, from basic embedded cores through to complex application processors with multi-cluster, multi-core, multi-threading and out-of-order pipelines.
Michael Wittner, Managing Director
Razorcat Development GmbH
Over the past 20 years TESSY has become the established reference platform for automatic regression testing and software maintenance.
In supporting the Imperas reference models and virtual platforms, our customers benefit from the quality reference models and flexibility to cover the configurations supported in deployed devices and plan for the next generation of hardware enhancements.