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We are proud to extend our long-standing relationship with Andes, and now announce Andes certification of our OVP models for their 32-bit/64-bit CPU cores, as a reference simulator.

Imperas virtual platform solutions and open-source models help accelerate embedded software development, debug and test for our customers. This certification demonstrates our great confidence in the accuracy and value of Imperas support for V5 AndesCore N25 and NX25 processors reference models and simulators for use by our customers, partners, and ecosystem

Imperas virtual platform solutions and tools help in the early phase of SoC and software development, UltraSoC embedded analytics enables hardware-based debug, development and testing. The combination of hardware and simulation solutions will help our mutual customers design the next generation of complex SoCs.

We are happy to see this alliance between two major members [Ashling Systems and Imperas Software] of our RISC-V Foundation. RISC-V has the potential to change the way SoCs and embedded systems are developed, and the business models around that.  To achieve this potential, a solid ecosystem is needed, including RISC-V community members working together to build solutions that are greater than the sum of the individual pieces.

Our integration with Imperas brings Ashling closer to our vision to become the provider of a complete RISC-V turnkey solution.

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