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Revolutionizing Embedded Software Development

Imperas is now a part of Synopsys

Imperas to Demonstrate Renesas Device Virtual Platforms at Renesas DevCon 2015

Embedded Software Development, Debug and Test Solutions to be Shown

Oxford, United Kingdom, September 22, 2015 -- Imperas Software Ltd., the leader in high-performance software simulation and virtual platforms, today announced their participation at Renesas DevCon 2015. Highlights will include demonstrations of Imperas embedded software development, debug and test solutions at the Imperas booth in the exhibition area.  The demos will feature virtual platforms for the latest and most popular Renesas devices, including those based on both Renesas proprietary processor cores and those devices based on ARM cores, such as the RCar family and the recently announced Synergy family.

Imperas will also participate in a panel session, “Handling Software Development Complexity”, to take place at 4:30PM Monday, October 12.  Experts from across the industry will discuss how the development process, tools and architectures must change to handle the challenge of rapidly increasing software complexity.  Topics include how to engineer distributed functions, how to integrate multiple ECUs, development of advanced human-machine interfaces, adoption of advanced operating systems, separation of hardware and software, meeting ISO 26262, using model based approaches, and adopting  AUTOSAR.

For more information, or to set up meetings with Imperas at Renesas DevCon, please email sales@imperas.com

Renesas DevCon 2015 is an intensive four-day event filled with over 200 hours of lectures and labs, a solutions filled exhibit hall, and free development tools. You'll also have the opportunity to learn from Renesas' best and brightest during the one-on-one 'Ask the Experts' sessions, as well as interacting with the Renesas community and ecosystem. This is an exciting time to be part of this rapidly growing industry.

When: October 12-15, 2015.

Where: Hyatt Regency Orange County, CA.

We look forward to seeing you at this year's DevCon!

About Imperas

For more information about Imperas, please see www.imperas.com.

All trademarks or registered trademarks are the property of Imperas Software Limited or their respective holders.

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Related Resources

There are many Imperas documents available. Some of them are accessed only from the Imperas User site and are available only to Imperas customers under license.

On the OVPworld website there are many documents that introduce the various APIs and technologies developed by Imperas and made available as part of Open Virtual Platforms. Click here for the OVPworld documentation list.

Publicly available Imperas documents:

RISC-V Processor Verification: ImperasDV with Synopsys VCS and Verdi Application Note

NSITEXE’s RISC-V Success Using ImperasDV and Cadence

ARM TrustZone Platform Modeling Application Note

Comments

  • Anders Holmberg, General Manager Embedded Development Tools

    IAR Systems

    64bit is not just about the word length or address space of a processor.

    The Arm v8 cores offer embedded developers a step change in performance and capability, this potential is now complemented with high performance simulation software. Software developers can migrate to the latest devices with confidence based on the IAR Systems development tools and Imperas simulator technology.

  • Professor Fernando Gehm Moraes

    Pontifical Catholic University of Rio Grande do Sul, Brazil - PUCRS

    At PUCRS, we use Imperas virtual platforms in projects on multiprocessor SoC modeling, power evaluation, and programmability, as well as computer science graduate program courses on SoCs and research architecture. Our research group (Grupo de Apoio ao Projeto de Hardware, or Hardware Design Support Group), also leverages these tools.