VDC Embedded Systems Practice, March 7th 2008

http://ontargetembedded.blogspot.com/
Posted by VDC Embedded Systems Practice
Friday, March 07, 2008 What Happened?

This week Imperas announced the release of its Open Virtual Platforms to “establish a common, open standard solution for developers to quickly and inexpensively simulate embedded software on system-on-chip (SoC) designs.”

Through the OVP Initiative, Imperas will provide what it claims to represent $4 million worth of its own R&D effort, including:

• OVPmodels - Open source model libraries of processors, components, peripherals, and templates which others are free to use, edit/update, and copy
• OVP APIs - APIs for developing models and verification infrastructure provided with no attached licensing costs
• OVPsim – A free reference simulator delivered as an executable solution (with limits on the source code availability and licensing terms)

Imperas has solicited the participation of the industry and has already gathered an impressive group of market leaders to join the initiative including IP suppliers such as MIPS, Tensilica, Denali, and notable ESL/EDA players like EVE, Forte, Carbon Design Systems, Calypto, CriticalBlue, and others. The company is still working out the details, but currently plans to manage the initiative and host the OVP community forum itself going forward.

Imperas believes that by opening up its virtual platform technology and simulation offering to the market at large, it may be possible to drive industry-standard practices around virtual platform development and help guide the market towards improved methods of software development/system simulation on complex hardware architectures. The company anticipates that by moving the market forward in this area, it can then build its business around software verification technologies, multi-core development, and other solutions complimentary to system simulation and virtual platforms. Expect more announcements from Imperas around their products at next month’s Multicore Expo.

VDC’s View
Imperas has certainly been coy about its overall product direction prior to this point, providing only small clues about its products and where it might play in terms of the overall ESL and multi-core software development space. This announcement provides a clearer sense of how the company will approach the market going forward.

There is no question that if the industry is able to agree on a set of common set of standards for building virtual platforms (what VDC has typically referred to as the virtual system prototyping/simulation market), market participants would be in a better position to collaborate with one other, leverage existing designs, and raise the overall level of productivity in creating virtual prototypes (something that is clearly needed for virtual platform methodologies to be successful in the long run). This is something that established virtual platform vendors such as Virtutech, VaST, Synopsys, CoWare, and ARM have been driving towards for some time now (though their vision of how this is to evolve is certainly different from Imperas’s particular approach in this case).

An open source model is an interesting concept here, and the early list of participants is encouraging, especially at the semiconductor IP level. Open source software has certainly changed the landscape in numerous software markets to date, and in VDC’s opinion a move toward this type of a model has the potential to alter the dynamics of the current market. The extent to which Imperas creates an environment that fits the real needs of the broader community and shares in the development and ownership of the technology is likely a key factor to its long term appeal and success. A critical next step will be to bring more parties to the table, including big EDA tools vendors, other semi IP suppliers, and the semiconductor suppliers themselves. VDC has noted a continued investment by IC suppliers in investing in product enablement through virtual platform technologies.

Imperas’s view that an established virtual platform market is the bridge to better multi-core software development and verification is likely in line with the views of many other market participants. In fact, if the company is able to propel greater industry standardization around virtual platform design and simulation, Imperas should expect increasing competition from bigger EDA companies at the software verification level.

While it is far too early to tell what impact this will have on the market, it will be certainly be interesting to gauge the reaction of other virtual platform tools providers and the rest of the market. Richard Goering also wrote an interesting piece on this announcement earlier this week.

Posted by VDC Embedded Systems Practice at 12:55 PM

Gabe Moretti, EDA DesignLine, March 5th 2008

On Monday Imperas announced that it is providing some high-level processor models, APIs for building platform verification infrastructure and developing behavioral and processor models, and OVPSim, a reference simulator. These will be downloadable for free from an OVP website or from SourceForge, an open-source code repository.

The company has valued its donation to $4 million, which is not a small amount of money for a startup. My first question was if Simon Davidmann, the founder of Imperas, had suddenly decided to give his wealth away and join a monastery. But that illusion quickly dissipated, since I do know Simon, and although his debating abilities would certainly help any order he joins, the monastic life style just does not fit him.

So why would a startup decide to put all of its existing ‘products’ into the public domain? The answer is simple: market creation. Although I have no doubt that what Imperas has managed to develop since its inception has significant engineering worth, the company has so far not met the high market visibility that Simon had predicted for his new company to anyone would listen shortly after he had sold Co-Design Automation to Synopsys. The market for Virtual Platforms is limited, and the competition from Mentor and Synopsys quite difficult to overcome because they can offer an entire suite of tools that carries a design team from architectural design through software integration and debug, to hardware design.

As the rest of the ESL companies can attest, this is not an exploding market, and growth is possible but slow and requires significant more investments than one could have planned a few years ago. Therefore, proving that he is not only a good engineer, but also an above average marketeer, Simon has instantly created a community, using the same market obstacles that would have challenged his company, to project it in the limelight and obtain support from the ESL community, always eager to find a new way to expand the market.

There are two major obstacles to the success of the Open Virtual Platform initiative. First of all, other companies must see the value of the site and donate valuable models and technology to it, and must do this is a short, say six months, period of time. Second, Imperas needs to build ‘for profit’ products that will not conflict with free donated technology. In other words, its competitors can render its life quite hard, simply by donating to OVP technology that competes with what Imperas intends to sell.

The Bottom Line
The industry will welcome OVP and will try to use it, after all ‘Open-Source’ is a key word lately since people equate it to ‘free stuff’. I think the following are the components of a successful OVP donation:

- The Imperas donations need to prove themselves valuable outside of the Imperas tools ecosystem.
- Processors and multi-processors vendors must provide free models to it.
- Other EDA companies must donate related technology to the site.
- Designers must find the site’s contents valuable as building blocks for their own internal design flows. An open-source components that cannot be used, is worthless.

So let’s wait. May be at DAC in June, you will find not only little placards in various exhibit booths proclaiming that the vendor is a member of OVP, but actual demos of how an OVP donation is being integrated in someone’s flow.

By Richard Goering

03/03/08

• C language APIs for building platform verification infrastructure, and developing behavioral and processor models.
• Open-source library of models for processors, components, peripherals, and platform templates.
• OVPsim, a free reference simulator shipped as an executable.

According to Simon Davidmann, Imperas CEO, OVP is the most important…

[For more, read the article here, or if it is not there, download a copy here]

OVP Movement Gaining Momentum with Widespread Industry Support: Hundreds of Users, Thousands of Downloads, 16 New Processor Models, and Linux Support

OVP Quote Sheet for Anniversary Release (June 2009)

AutoESL, Atul Sharan, CEO

www.autoesl.com

“Virtual platforms are part of a successful system level design environment. Open Virtual Platforms enables our customers to easily and quickly verify their system level design prior to using our tools for implementation.”

Cadence, Ran Avinun, Group Marketing Director, System Design and Verification

www.cadence.com

“The ease with which users can utilize OVP to build a virtual platform, then integrate OVPsim with Cadence’s Incisive Software eXtensions product, enables much more rigorous and robust verification of hardware/software interactions.  System and software developers can now take the same industry leading verification technology and methodology being used on the design of their SoC for verification of the virtual platform before sharing it with application developers, or of the complete application software system.”

Doulos, John Aynsley, CTO

www.doulos.com

“Part of the OSCI TLM-2.0 value proposition is that it makes the development of fast virtual platforms for software development easier to achieve. The alignment of OVP with the TLM-2.0 standard helps address one of the critical requirements for the successful deployment of virtual platforms, which is the ready availability of processor models.”

GreenSoCs, Mark Burton

www.greensocs.com/

GreenSocs provides Open Source SystemC infrastructure, and welcomes all open source initiatives in this space. Open Virtual Platforms, with its processor and peripheral modeling technology is a welcome addition to the embedded systems development community.”

Indian Institute of Technology, Delhi, Dr. Anshul Kumar, Professor of Computer Science and Engineering

www.cse.iitd.ac.in

“Open Virtual Platforms is a perfect fit for universities doing research in the area of embedded systems. The free and open aspect of OVP is great, however it is the ease of use and simulation performance of the technology that make it truly useful to us.”

Posedge Software, Dave Von Bank, President

www.posedgesoft.com

“As a service provider in both the hardware verification and embedded software segments, we have a long history with hardware-software co-verification environments with roots back to its infancy in the mid-1990s.  There are several ideal characteristics of such an environment: speed, processor and peripheral model availability, model accuracy, and robust debugging capabilities - all without requiring any significant changes to the hardware or software of the target system.  With the integration of the OVP simulator and Cadence’s Specman Elite ISX tool, we can now add advanced verification capabilities including coverage-driven, constrained-random verification.  The combination of characteristics represents the Holy Grail of hardware-software co-verification.”

University of Southampton, Dr. Mark Zwolinski, Professor

www.ecs.soton.ac.uk

“Open Virtual Platforms has been an outstanding tool for my students. Its ease of use and speed of simulation performance has enabled them to build and debug complex models of processors and systems.”

University of Washington, Andrew Putnam, Researcher

www.cs.washington.edu

“OVP is awesome. I’m working on large, many-core systems, and was able to get a 1024 core system running in minutes. With Dhrystone benchmark performance of over 450 MIPS, OVPsim demonstrates that it scales well and runs impressively fast.”

VinChip, Chezi Ganesan, President & CEO

www.vinchip.com

“VinChip, an established developer of hardware IP cores, believes that there is significant opportunity in developing models at a higher level of abstraction.  Open Virtual Platforms enables IP providers like VinChip to add more value to our product line.”

Quotations from Open Virtual Platforms Launch:

Azul Systems Inc., John Brennan, VP Hardware Engineering

http://www.azulsystems.com/

Azul Systems, a global provider of enterprise server appliances that deliver compute and memory resources as a shared network service to transaction-intensive applications, such as those built on the Java platform, has successfully used the OVP technology to develop a virtual platform for the Azul Vega multiprocessing appliance (Azul Compute Appliance). This OVP-based platform has enabled our software development team to streamline the development process overall. In addition, the Azul OS boots just as fast on the OVP platform as it does on the SoC.

Beyond Semiconductor, Matjaz Breskvar, Founder & CEO

http://www.beyondsemi.com/

Beyond Semiconductor is excited to have models of our processor IP available for the embedded software community through the open source OVP initiative.  This helps our customers employ the BeyondSemi IP on their SoC and MPSoCs, and increases the choice of software/hardware development tools available to our customers.

Brian Bailey, consultant

http://brianbailey.us/

Finally!  With OVP, we have group of people and companies that realizes that software verification and debug has not yet become a solved issue and also understands that it is not a trivial problem. At the same time, they have also identified the primary reason holding virtual platforms back from more general adoption, that being model interoperability. Without these problems being solved the RTL level never would have taken off either.

Some have said that the system level virtual platform is the ‘killer app’ for ESL.  But companies that make these tools continue to struggle.  Virtual platforms are the rallying point for an ESL methodology but so far nobody has managed to create the right level of performance with the debug abilities necessary.  OVP promises to change this situation with a new model execution platform that could transform the industry.

Calypto^TM Design Systems Inc., Mitch Dale, Marketing Director

http://www.calypto.com/

ESL has become a mainstream design methodology; as such, customers require system-level to verified RTL design flows built on best of class tools connected through standard, open interfaces. Open source, OVP system modeling tools are an important part of the ESL design flow, linking software developers to advanced system-level hardware design methods.

Carbon Design Systems^TM Inc., Bill Neifert, CTO

http://www.carbondesignsystems.com/

As the supplier of Carbon Model Studio, a solution for the automatic generation, validation and implementation of hardware-accurate software models, we have found that design teams value a tool offering a broad range of debug capabilities.  With a holistic approach to system/software modeling, OVP presents an innovative way for them to manage the testing of their embedded software.

Carnegie Mellon University, Prof. Don Thomas

http://www.ece.cmu.edu/~thomas/

In research and education, around processor architectures and embedded software, it is essential to have a good environment to evaluate alternatives.  The creation of OVP provides us with a flexible and powerful technology to develop models of complex multi-core systems to be the building blocks we need.

CriticalBlue, David Stewart, CEO

http://www.criticalblue.com/

As a pioneer of software-driven design methodologies, CriticalBlue applauds effective, industry-wide initiatives such as OVP. By making generally available a valuable and critical technology resource, OVP will provide a common technology foundation that accelerates the mainstream adoption of practical end-to-end design solutions.

Denali Software Inc., Mark Gogolewski, CTO

http://www.denali.com/

The fundamental excitement around the OVP launch is due to the ability for the industry to coalesce around an open infrastructure and enable real software development earlier in the design process.  This effectively creates a new market for model developers to extend our support to software developers in multicore environments.

ElementCXI, Inc., Bob Barker, VP Business Development

http://www.elementcxi.com/

The OVP approach of open sourcing key technology will help our customers by reducing their risk of adopting new proprietary technologies.

EVE, Lauro Rizzatti, General Manager of EVE-USA, VP Marketing

http://www.eve-team.com/

OVP will enable a community discussion around embedded software verification, helping our customers to implement better verification methodology and in the end promoting better and broader use of our verification products.

Forte Design Systems Inc., John Sanguinetti, CTO and founder

http://www.forteds.com/

Virtual platforms are one of the most valuable components of a system design environment. They provide the basis for system verification and design exploration.  Open Virtual Platforms is an important technology that will allow the industry to standardize on the underlying framework for creating virtual platforms and models.

Imperas Ltd., Simon Davidmann, CEO and founder

http://www.imperas.com/

As the enabling technology for embedded software development, Imperas believes that a software virtual platform infrastructure should include free models  and be freely available.  This infrastructure benefits the complete OVP ecosystem, enabling software development success for users, new markets for tool developers, a more level playing field for IP providers, and more opportunities for service providers.

Jennic Ltd., Jim Lindop, founder and CEO

http://www.jennic.com/

With the proliferation of embedded processors, like those in our ZigBee devices, the OVP models will become very useful for the efficient development of application software. As devices get more complex, more applications will need to be developed on virtual platforms such as OVP.

MIPS Technologies Inc., Jack Browne, VP Marketing

http://www.mips.com/

OVP provides another channel for MIPS to expose SoC architects and embedded software developers to our processor IP, and makes it easier for our customers to port applications to our processors.  With software now a major part of overall SoC development costs, OVP models and associated tools will enable our customers to accelerate their SoC deliveries.

SpringSoft Inc., Scott Sandler, US CEO

www.springsoft.com

As designs become more complex with more processors, protocols, code, and concurrency, OVP promises to help resolve the increasing difficulty of embedded software verification and debug by enabling a new generation of tools. We look forward to the resulting increase in our market opportunity.

SiBridge Technologies, Samir Shroff, founder and VP Engineering

http://www.sibridgetech.com/

Our customers are asking us to do more application software verification.  The hardware virtual platforms we have used previously for firmware development are just not fast enough for embedded software development.  OVP will allow us to satisfy our customers and grow our business.

Sigmatix, Dave Kelf, President and CEO

www.sigmatix.com

A wave of practical solutions are emerging, based on a new understanding of the design issues associated with combined hardware and software functional implementation. This bold and exciting move by Imperas demonstrates a departure from EDA norms, and the kind of revolutionary thinking we need. We see OVP as a catalyst for a new direction in system design solutions.

Tensilica Inc., Chris Jones, Director of Strategic Alliances

http://www.tensilica.com/

The rapidly evolving realm of ESL modeling tools is a vital ingredient in the growth of multi-processor SOCs.  This OVP Initiative introduced by Imperas has the potential to be a catalyst in advancing the rate of growth of MPSOC designs.

VDC, Matt Volckmann, Senior Analyst/Program Manager, Embedded Software

www.vdcresearch.com

“There is no question that if the industry is able to agree on a set of common set of standards for building virtual platforms, market participants would be in a better position to collaborate with one other, leverage existing designs, and raise the overall level of productivity in creating virtual prototypes. This is something that is clearly needed for virtual platform methodologies to be successful in the long run. Imperas’s open source model is an interesting concept here, and the early list of participants is encouraging, especially at the semiconductor IP level. Open source software has certainly changed the landscape in numerous software markets to date, and in VDC’s opinion a move toward this type of a model has the potential to alter the dynamics of the current market.”

Imperas Unleashes Open Source Initiative to Establish Common, Open Standard for Multicore SoC Design

Thame, U.K. –– March 3, 2008 –– Imperas Ltd. today launched Open Virtual Platforms (OVP) to establish a common, open standard solution for developers to quickly and inexpensively simulate embedded software on system-on-chip (SoC) designs.

The donation, representing approximately $4 million worth of technology investment, includes modeling technology, Imperas’ existing library of models, and OVPSim, a proven reference simulator. Imperas will support and manage the OVP website, and will contribute much of its innovation to keep this infrastructure evolving.

“Proprietary platform technologies that limit interoperability, or that are too slow for adequate software verification, have dramatically limited the progress of this entire industry,” asserts Simon Davidmann, Imperas’ chief executive officer and founder. “OVP is the first realistic solution to these problems and, as such is, the most important donation related to SoCs since SystemVerilog. The groundswell of initial support clearly demonstrates the need for revolutionary thinking in this area.”

OVP addresses problems embedded software developers have when modeling the SoC that hosts their software. These range from modeling environment complexity, lack of open resources for building platforms, to insufficient simulation speed for software verification.

The quality and performance of the OVP technology has already been proven in production design projects by multiple end-users, including Azul Systems Inc., provider of enterprise server appliances. It has successfully used the OVP technology to develop a virtual platform for the Azul Vega multiprocessing appliance, known as the Azul Compute Appliance. “This OVP-based platform has enabled our software development team to streamline the development process overall,” remarks John Brennan, Azul’s vice president of hardware engineering. “In addition, the Azul OS boots just as fast on the OVP platform as it does on the SoC.”

Multicore Issues
The embedded software programming issues introduced by the trend toward multicore SoCs is well documented as the most significant problem for SoC delivery today. As SoC architects add more processor cores, embedded software complexity and volume increases exponentially due to amplified software concurrency and shared on-chip resource bottlenecks.

The best way to solve these problems is to comprehensively test the software early in the process, which requires a simulation platform. The platform must handle SoC complexity and deliver the performance required to verify billions of operational “cycles.” The solution must permit model interoperability and the use of legacy models to reduce integration risks and costs. End users, tool and intellectual property (IP) developers and service providers all must be able to contribute to the platform development infrastructure.

The OVP-based platform satisfies these criteria by enabling software simulations that execute at hundreds of MIPS. It handles multicore architectures, and has a robust set of application programming interfaces (APIs) for the easy modeling of processors, components and platforms. The utilization of an open source modeling approach enables the community to drive the further technology development and leverage existing work.

“OVP provides another channel for MIPS to expose SoC architects and embedded software developers to our processor IP, and makes it easier for our customers to port applications to our processors,” notes Jack Browne, MIPS Technologies’ vice president of marketing. “With software now a major part of overall SoC development costs, OVP models and associated tools will enable our customers to accelerate their SoC deliveries.”

The OVP Ecosystem
The OVP infrastructure benefits the complete OVP ecosystem, enabling software development success for users, new markets for tool developers, a level playing field for IP providers, and more opportunities for service providers. The initial list of supporters for OVP includes: Azul Systems Inc.; Beyond Semiconductor; Brian Bailey Consulting; Calypto™ Design Systems Inc.; Carbon Design Systems™ Inc.; CriticalBlue; Denali Software Inc.; Element CXI, Inc.; EVE; Forte Design Systems Inc.; Imperas Ltd.; Jennic Ltd.; MIPS Technologies Inc.; Novas Software Inc.; Sigmatix; SiBridge Technologies; Professor Don Thomas of Carnegie Mellon University; and Tensilica Inc.

“The fundamental excitement around the OVP launch is due to the ability for the industry to coalesce on an open infrastructure and enable real software development earlier in the design process,” remarks Mark Gogolewski, Denali’s chief technology officer. “This effectively creates a new market for model developers to extend our support to software engineers in multicore environments.”

OVP Donation and Website
The OVP website is found at www.OVPworld.org. It will serve as the portal for OVP, with details about the technology, a discussion forum for the OVP community, and links to download all OVP components.

Available for download, free of charge are:

• APIs for building platform verification infrastructure, and developing behavioral and processor models

• Existing model libraries of processors, behavioral components, peripherals, and platform templates

• OVPsim, a free reference simulator shipped as an executable

The website offers presentations, datasheets, videos, demonstrations, discussion forums, press information, resources and the OVP technology for download including models of ARM, MIPS, and OpenRISC OR1K processors.

About Imperas
Imperas is focused on delivering technology in the Electronic Design Automation (EDA) space. By blending hardware and software technologies and design processes together, Imperas provides methodologies, technologies and products to enable the efficient programming, debug, and verification of Multiprocessor Systems-on-Chip (MPSoCs). With an engineering base in the UK, Imperas distributes its products to customers worldwide. For more information, visit: http://www.imperas.com.

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Imperas acknowledges trademarks or registered trademarks of other organizations for their respective products and services.

Note to Editors and Analysts: Please see OVP Quote Sheet with quotes from executives from throughout the Electronics and Semiconductor industry supporting OVP.

For more information, visit: www.OVPworld.org.

Peter Clarke, EE TImes Europe, (03/02/2008 7:00 PM EST)

LONDON — Imperas Ltd., a young company developing multiprocessing development tools, has announced that it has donated technology for an open-source infrastructure to support developers who want to simulate software running on system-on-chip designs. Imperas (Thame, England) is providing some high-level processor models, APIs for building platform verification infrastructure and developing behavioral and processor models, and OVPSim, a reference simulator. These will be downloadable for free from an OVP website or from SourceForge, an open-source code repository. The company has also been pitching its approach around the semiconductor and EDA industries and an initial list of about 20 supporters includes…

[For more read the article here, or if it is not there, download a copy here]