ARM Integrator Virtual Platform Speeds Embedded Software Development

THAME, United Kingdom, February 22, 2010 – The Open Virtual Platforms (OVP) initiative (www.OVPworld.org) has announced the release of a reference virtual platform of the ARM Integrator development board using OSCI SystemC TLM-2.0 C++. This virtual platform includes all the models needed for the virtual platform to enable users to run Linux. The virtual platform can be executed either in the OVP simulator (OVPsim), or in a SystemC/TLM-2.0 simulation environment using any of the industry SystemC/TLM-2.0 simulators. The virtual platform and all models are free and available as open source from the OVP website.

“We have used the ARM Integrator virtual platform available from OVP to help our customers understand how Linux and drivers worked on their hardware,” said Dave Von Bank, president of Posedge Software, a consulting company for embedded software engineering. “We’re happy to use and contribute to the OVP open source initiative for embedded software development.”

The OVP ARM Integrator virtual platform can be used to understand the Linux operating system running on the development board, since the virtual platform simulation can provide more visibility and controllability than just executing and debugging on the hardware itself. The virtual platform can also be used for the development of applications running under Linux on an ARM-based system. Moreover, the virtual platform is open source, and it’s easy to add peripherals to the virtual platform using SystemC/TLM-2.0 models and develop drivers for those peripherals.

“For my course on System-on-Chip (SoC) Design, students learn about both hardware and software development aspects,” said Professor Andreas Gerstlauer of the Electrical and Computer Engineering Department at the University of Texas at Austin. “We eventually implement a software defined radio design on an ARM-based FPGA prototyping board. I have found the Open Virtual Platforms models allow my students to simulate the software, from drivers to applications running on top of the Linux OS. We use the OVP models in a SystemC/TLM-2.0 simulation environment, and find them fast and easy to use. That the models are open source and come with excellent documentation and support is an added benefit.”

“Virtual platforms make software development easier and more efficient,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “It’s great that students and software developers can have free access to use models that run at real-time speeds in industry standard simulation environments.”

The ARM Integrator virtual platform includes the OVP model of the ARM926EJ-S processor core, which runs at hundreds of millions of instructions per second (MIPS), as well as models of the other peripherals on the ARM Integrator development board. The virtual platform utilizes host workstation resources for keyboard and display. This virtual platform can be run in either OVPsim or SystemC/TLM-2.0 simulators, and in either simulation environment boots Linux in less than 10 seconds.

Open Virtual Platforms (www.OVPworld.org)
OVP, which is quickly becoming the de facto source for fast models of processors, includes the OVPsim simulator, libraries of models and APIs for developing new models. OVPsim executes platforms, including multicore platforms, at hundreds of millions of instructions per second, providing the speed that software developers require for simulation of embedded systems. Model libraries include everything from models of individual processors (over 40 available for ARC, ARM, MIPS, NEC and OpenCores) and component models to more complex platforms, such as ARM IntegratorCP and MIPS Malta development boards for running Linux. All OVP processor models include a SystemC/TLM-2.0 interface for easy integration in those virtual platform environments. OVP APIs enable the embedded software community to develop models of processors, behavioral components and peripherals, and to connect these together into virtual platforms that run the final target system software binaries unchanged. Since its founding in early 2008, over 2,100 people have registered on the OVP website.

About the OVP Initiative (www.OVPworld.org)
The OVP initiative was founded with a donation by Imperas of approximately $4 million of simulation infrastructure. The goal of organization is to help the industry to build an effective multi-core development infrastructure through the use and adoption of open virtual platform technology. The website serves as a portal for OVP members covering details about the technology, providing a discussion forum for the community, and links to download each component. The technology has the support of electronic design automation (EDA) companies, end users and intellectual property (IP) providers. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.

About Imperas (www.imperas.com)
Imperas provides methodologies, technologies and products to enable the efficient and effective verification of software functionality and software performance for embedded systems. Its products enable software functional verification, performance profiling, and analysis for embedded software operating on multiprocessor MPSoCs. With an engineering base in the United Kingdom, Imperas distributes its products to customers worldwide. For more information, visit www.imperas.com.

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

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Models of MIPS™ 74K™ Processor and 1004K™ Multicore Processor Developed Under MIPS-Verified™ Program

THAME, United Kingdom, February 17, 2010 – The Open Virtual Platforms (OVP) initiative (www.OVPworld.org), has released new models of MIPS Technologies, Inc. processor cores and continues its move to becoming the de facto source of fast models. The MIPS 74K and 1004K processors are the most advanced cores from MIPS, with the 1004K being a multi-core, multi-threaded processor, with up to 4 cores and 2 threads per core. MIPS has verified the functionality of these models under the MIPS-Verified program. These models work with the OVP simulator, OVPsim, where they have shown exceptionally fast performance of hundreds of millions of instructions per second.

Embedded software complexity is increasing rapidly, especially with multicore and multi-threaded processors like the MIPS 1004K being utilized for embedded systems. This complexity, and associated problems with software schedules and bugs, drives users to start development earlier in the project. Early simulation of software with OVP technology provides benefits of both increased productivity and increased quality.

All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, the tools they need for a more robust development environment. Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the TLM-2.0 interface available with all OVP processor models.

“Bringing simulation to software development is a natural step to an earlier start to software development, and better debugging and analysis of multicore software. Bringing low cost simulation tools and free, fast models of state of the art processors such as the MIPS 74K and 1004K is why we founded Open Virtual Platforms.,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “OVP now has the full range of MIPS32 cores available as fast models. OVP is rapidly becoming the de facto place to source fast models.”

Open Virtual Platforms (www.OVPworld.org)
OVP includes the OVPsim simulator, libraries of models and APIs for developing new models. OVPsim executes platforms, including multicore platforms, at hundreds of millions of instructions per second, providing the speed that software developers require for simulation of embedded systems. Model libraries include everything from individual processor models (from ARC, ARM, MIPS and OpenCores) and component models to more complex platforms, such as ARM IntegratorCP and MIPS Malta development boards for running Linux. All OVP processor models include a SystemC/TLM-2.0 interface for easy integration in those virtual platform environments. OVP APIs enable the embedded software community to develop models of processors, behavioral components and peripherals, and to connect these together into virtual platforms that run the final target system software binaries unchanged. Since its founding in early 2008, over 2100 people have registered on the OVP website.

About the OVP Initiative (www.OVPworld.org)
The OVP initiative was founded with a donation, by Imperas, of approximately $4 million of simulation infrastructure. The goal of organization is to help the industry to build an effective multi-core development infrastructure through the use and adoption of open virtual platform technology. The website serves as a portal for OVP members covering details about the technology, providing a discussion forum for the community, and links to download each component. The technology has the support of electronic design automation (EDA) companies, end users and intellectual property (IP) providers. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.

About Imperas (www.imperas.com)
Imperas provides methodologies, technologies and products to enable the efficient and effective verification of software functionality and software performance for embedded systems. Its products enable software functional verification, performance profiling, and analysis for embedded software operating on multiprocessor MPSoCs. With an engineering base in the United Kingdom, Imperas distributes its products to customers worldwide. For more information, visit www.imperas.com.

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.
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OVP Quickly Becoming the De Facto Source of Fast Processor Models

THAME, United Kingdom, February 17, 2010 – The Open Virtual Platforms (OVP) initiative (www.OVPworld.org) has also announced the release of new models of NEC processor cores. The NEC v850 series of processor cores, including the base instruction set as well as the E1 and E2 additions, is a workhorse in the embedded systems market, most commonly used in automotive and other applications.

“In the automotive electronics industry we always need to do more testing of our embedded systems software,” said Urban Forssell, CEO of NIRA Dynamics AB, a subsidiary of Audi Electronics Venture GmbH. “Finding that the simulation performance of the Imperas/OVP NEC model was 50 times faster than our previous solution opens up new possibilities for us in software testing, and enables us to increase our test coverage and product reliability,”

“For the last 20 years we wouldn’t dream of building an integrated circuit without simulating the hardware,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “Bringing simulation to software development is a natural step. Bringing low cost simulation tools and free, fast models of state of the art processors such as the NEC v850 is why we founded Open Virtual Platforms. With over 40 processor models available, OVP is quickly becoming the de facto source of fast models.”

Open Virtual Platforms (www.OVPworld.org)
OVP includes the OVPsim simulator, libraries of models and APIs for developing new models. OVPsim executes platforms, including multicore platforms, at hundreds of millions of instructions per second, providing the speed that software developers require for simulation of embedded systems. Model libraries include everything from models of individual processors (over 40 available from ARC, ARM, MIPS, NEC and OpenCores) and component models to more complex platforms, such as ARM IntegratorCP and MIPS Malta development boards for running Linux. All OVP processor models include a SystemC/TLM-2.0 interface for easy integration in those virtual platform environments. OVP APIs enable the embedded software community to develop models of processors, behavioral components and peripherals, and to connect these together into virtual platforms that run the final target system software binaries unchanged. Since its founding in early 2008, over 2,100 people have registered on the OVP website.

About the OVP Initiative (www.OVPworld.org)
The OVP initiative was founded with a donation by Imperas of approximately $4 million of simulation infrastructure. The goal of organization is to help the industry to build an effective multi-core development infrastructure through the use and adoption of open virtual platform technology. The website serves as a portal for OVP members covering details about the technology, providing a discussion forum for the community, and links to download each component. The technology has the support of electronic design automation (EDA) companies, end users and intellectual property (IP) providers. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.

About Imperas (www.imperas.com)
Imperas provides methodologies, technologies and products to enable the efficient and effective verification of software functionality and software performance for embedded systems. Its products enable software functional verification, performance profiling, and analysis for embedded software operating on multiprocessor MPSoCs. With an engineering base in the United Kingdom, Imperas distributes its products to customers worldwide. For more information, visit www.imperas.com.

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

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OVP Becomes Founding Member of Synopsys System-Level Catalyst Program

THAME, United Kingdom, October 8, 2009– The Open Virtual Platforms (OVP) initiative (www.OVPworld.org), founded by Imperas and now boasting more than 1,500 individuals from the embedded systems community registered on the website, has released new models of ARM processor cores. These models work with the OVP simulator, OVPsim, and have exceptionally fast performance of hundreds of millions of instructions per second (MIPS). Additionally, OVP became a founding member of the Synopsys System-Level Catalyst Program. OVP technology provides solutions to the problems embedded software developers incur when modeling the multi-processor system on chip (MPSoC) that hosts their software.

The ARM models released are for the v4 and v5 instruction sets from ARM, supporting 13 processor cores across the ARM7, ARM9 and ARM10 families of processor cores. This includes the ARM926E processor core, the most popular core developed by ARM. These models are instruction accurate, typically enabling simulation speeds of hundreds of MIPS, thus meeting the requirements of application and firmware engineers for their development environments. In addition to working in OVP virtual platforms, the models include SystemC/TLM-2.0 interfaces, enabling native operation in SystemC environments.

“In the automotive electronics industry we always need to do more testing of our embedded systems software. Finding that the simulation performance of the Imperas/OVP ARM model was over 50 times faster than our previous solution opens up new possibilities for us in software testing, and enables us to increase our test coverage and product reliability,” said Urban Forssell, CEO of Nira Dynamics AB, a subsidiary of Audi Electronics Venture GmbH.

As the complexity of software running on MPSoCs increases, the need for a cost effective virtualized software development environment has become critical. “Open Virtual Platforms provides needed modeling and simulation tools for next generation embedded systems software development,” stated Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “The models of the ARM processor cores give OVP users needed models. Also, working with Synopsys as a founding member of the System-Level Catalyst Program ensures interoperability with the popular Synopsys system-level tools, the DesignWare® System-Level Library of models, and virtual platforms using the Innovator development environment.”

“The goals of the Synopsys System-Level Catalyst Program are to increase model availability and tool interoperability with both the Synopsys Innovator virtual platform development environment and the DesignWare® System-Level Library of TLM-2.0 models, enabling developers to do more work at the system level,” said Frank Schirrmeister, product marketing director for the Solutions Group at Synopsys. “Open Virtual Platforms’ models support of TLM-2.0 further confirms the quality of OSCI’s transaction-level APIs and provides users with more model options, strengthening the overall system-level ecosystem.”

Gert-Jan Tromp, senior consultant at Dizain-Sync B.V., said that “We were excited to have achieved over 500 MIPS performance for an ARM 7 virtual platform benchmark using OVPsim. We were similarly excited at how easy it was to use OVP processor models in a TLM-2.0 virtual platform.”

In addition to making the models for ARM processors available as free and open source, OVP offers free, open source example virtual platforms for OVP users to download from the OVP website. These example platforms include bare metal applications, the Atmel AT91SAM7 product with the ARM7TDMI core running the uClinux operating system, and the ARM IntegratorCP platform with the ARM926EJ-S core, which boots the Linux operating system in less than 10 seconds. “Key tasks for embedded software developers include porting operating systems and drivers to new platforms, and developing new applications to run on the SoCs,” commented Davidmann. “Fast simulation and easy development of platforms is necessary for these complex systems.”

Open Virtual Platforms (www.OVPworld.org)
OVP includes the OVPsim simulator, libraries of models and APIs for developing new models. OVPsim executes platforms, including multicore platforms, at hundreds of millions of instructions per second, providing the speed that software developers require for simulation of embedded systems. Model libraries include everything from individual processor models (from ARC, ARM, MIPS and OpenCores) and component models to more complex platforms, such as ARM IntegratorCP and MIPS Malta development boards for running Linux. OVP APIs enable the community to develop models of processors, behavioral components and peripherals, and to connect these together into virtual platforms that run the final target system software binaries unchanged.

About the OVP Initiative (www.OVPworld.org)
The OVP initiative was founded with a donation by Imperas of approximately $4 million of simulation infrastructure. The goal of organization is to help the industry to build an effective multi-core development infrastructure through the use and adoption of open virtual platform technology. The website serves as a portal for OVP members covering details about the technology, providing a discussion forum for the community, and links to download each component. The technology has the support of electronic design automation (EDA) companies, end users and intellectual property (IP) providers. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.

About Imperas (www.imperas.com)
Imperas provides methodologies, technologies and products to enable the efficient and effective verification of software functionality and software performance for embedded systems. Its products enable software functional verification, performance profiling, and analysis for embedded software operating on multiprocessor MPSoCs. With an engineering base in the United Kingdom, Imperas distributes its products to customers worldwide. For more information, visit www.imperas.com.

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services. Synopsys and DesignWare are registered trademarks of Synopsys, Inc.

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OVP Movement Gaining Momentum with Widespread Industry Support: Hundreds of Users, Thousands of Downloads, 16 New Processor Models, and Linux Support

THAME, United Kingdom, June 22, 2009– The Open Virtual Platform (OVP) initiative (www.OVPworld.org), founded by Imperas with the help of 18 companies and individuals from the embedded systems user community, processor intellectual property developers, electronic design automation, service providers and academia, has celebrated its one year anniversary. OVP technology provides solutions to the problems embedded software developers incur when modeling the multi-core system on chip (MPSoC) that hosts their software. Imperas reported that more than 1,200 individuals have registered on the OVP website (www.ovpworld.org) with more than 8,000 downloads of models and tools.

As demand for Multi-Core platforms and MPSoCs increases the need for a suitable, cost effective virtualized software development environment has become critical. “We recognized the weaknesses inherent in the current development environments for software running on multi-core parallel platforms and MPSoCs and the success and support of the OVP initiative has been phenomenal ,” stated Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “We launched OVP a year ago to provide that infrastructure – free open source models and infrastructure focused on multi-core and speed – for simulating the platforms used for embedded software development. Our open virtual platforms provide a vehicle for embedded software developers, deliver complete transparency and control over the software being developed. Simulation technology is the key.”

Imperas reports that the success of OVP is prompting processor vendors, OS providers and embedded systems companies and others to increase adoption of simulation technology and virtual platforms as key components in their development environments. Nine companies and institutions have already added their support to the original founding companies bringing the OVP membership to 27 companies. These include: Cadence, CriticalBlue, Denali, EVE, Forte, MIPS, SpringSoft, Tensilica, Doulos, PosedgeSoftware, VinChip.

“The ease with which users can utilize OVP to build a virtual platform, then integrate OVPsim with Cadence’s Incisive Software eXtensions product, enables much more rigorous and robust verification of hardware/software interactions.” Said Ran Avinun, Group Marketing Director at Cadence. Avinun continued “System and software developers can now take the same industry leading verification technology and methodology being used on the design of their SoC for verification of the virtual platform before sharing it with application developers, or of the complete application software system.”

“Developing software for complex SoCs demands the use of extremely fast virtual platforms and the success of open virtual platforms is addressing these unique requirements,” commented Davidmann. “The availability of fast, vendor certified processor models and the growing library of open source components and platforms demonstrates that the embedded system community recognizes that OVP can help make software developers more productive, ensure higher quality software and dramatically reduce development costs for MPSoCs.”

Chezi Ganesan, President & CEO of VinChip Systems, Inc., said: “VinChip, an established developer of hardware IP cores, believes that there is significant opportunity in developing models at a higher level of abstraction. Open Virtual Platforms enables IP providers like VinChip to add more value to our product line.”

Year One Milestones:
The primary OVP objective is to enable the industry to build a suitable and effective multi-core virtual platform software development infrastructure. Year one OVP Milestones include:
• the development of 16 processor models
• the addition of a native interface to the SystemC/Transaction Level Modeling (TLM)-2.0 interface
• the availability of platforms that boot operating systems, including multi-core SMP Linux running faster than real time,
• the verification of processor models by 2 major vendors including the MIPS32 4K, 24K and 34K families being MIPS-Verified™ by MIPS Technologies and the ARC® 605 being verified by ARC International.
• research projects utilizing OVP by the Indian Institute of Technology Delhi and the University of Southampton
• the donation of open source peripheral and behavioral models to the OVP community, available for free download from the website
• the integration of other tools to the Open Virtual Platforms simulator (OVPsim) for enhanced software functional and performance verification, including Cadence’s Incisive Software eXtensions (ISX)
In related news, the success of OVPsim on Windows and requests from the OVP user base for Linux hosted machines has led to its release for non-commercial usage.

Open Virtual Platforms
OVP includes the OVPsim simulator, libraries of models and APIs for developing new models. OVPsim executes platforms, including multicore platforms, at hundreds of millions of instructions per second, providing the speed that software developers require for simulation of embedded systems. Model libraries include everything from individual processor and component models to more complex platforms, such as MIPS Malta development board for running Linux. APIs enable the community to develop models of processors, behavioral components and peripherals, and to connect these together into virtual platforms that run the final target system software binaries unchanged.

About the OVP Initiative (www.OVPworld.org)
The OVP initiative was founded with a donation by Imperas of approximately $4 million of simulation infrastructure. The goal of organization is to help the industry to build an effective multi-core development infrastructure through the use and adoption of open virtual platform technology. The website (www.OVPworld.org) serves as a portal for OVP members covering details about the technology, providing a discussion forum for the community, and links to download each component. The technology has the support of electronic design automation (EDA) companies, end users and silicon intellectual property (IP) providers.

About Imperas (www.imperas.com)
Imperas provides methodologies, technologies and products to enable the efficient and effective verification of software functionality and software performance for embedded systems. Its products enable software functional verification, performance profiling, and various analytical tools for embedded software operating on multiprocessor MP SoCs. With an engineering base in the United Kingdom, Imperas distributes its products to customers worldwide. For more information, visit www.imperas.com.
Detailed quotations regarding OVP from all 27 companies are available from:  here.

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

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Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, has announced its System-Level Catalyst Program to accelerate the adoption of system-level design and verification.

Imperas is a founding charter member, joining at the program’s creation. “The integration of Open Virtual Platforms (OVP) processor models with the Synopsys Innovator tools provides customers with an expanded set of IP with which to build virtual platforms. Moreover, the native TLM-2.0 interface in the instruction accurate OVP models ensures that users will have the fastest possible simulation performance, as is required for software development on virtual platforms, ” said Simon Davidmann, Imperas CEO.

System-Level Catalyst Program is designed to benefit mutual customers by advancing tool and model interoperability as well as availability of system-level models and services.

The members of the program include Synopsys, Imperas, and many other supporters of the Open Virtual Platforms initiative, including: Carbon, CriticalBlue, Doulos, Forte, GreenSocs, and Tensilica.

[For more information, please see the Synopsys press release here]

In April09 we sent out a survey to the over 1,000 OVPworld registered users, for information about how they are using OVP and some information about the direction we should take in the future. Questions included the potential for OVPsim on Linux and funding future product support and ongoing versions.

Based on feedback we are making some changes.

Until now, OVPsim has been available on Linux to Imperas commercial customers only and was funded by their commercial contracts. We are now making OVPsim available on Linux to the wider OVP community.

To enable and fund this, from the new release, OVPsim will only be free for non-commercial usage. Commercial use of OVPsim on Windows or Linux will now require a commercial license from Imperas with pricing from $300/month per user. Commercial users can download and use the free OVPsim for evaluation purposes.

You can, of course, continue to use any existing OVPsim release you have under its current 3 year license.

To find out more about the new OVPsim Linux/Windows version, and its new capabilities please visit the forums.

For more about the licensing and definitions of commercial use etc, please visit here.

Thank you for your support and interest.

Simon Davidmann
OVP Founder
CEO, Imperas

Releases Imperas-Developed CPU Models With Leading Performance

Thame, U.K. – February 5, 2009 — Open Virtual Platforms (OVP) today released new native SystemC transaction level modeling (TLM)-2.0 technology to use with OVP CPU models that run to the speed of one billion (1B) instructions per second (1,000 MIPS).

These models, developed by Imperas, are free to download and use, and are available through the www.OVPworld.org site.

“These are the fastest CPU models available and we are now making them available for free to the SystemC community to work with native TLM-2.0,” says Simon Davidmann, OVP founder and chief executive officer (CEO) of Imperas.

The ability to model CPUs at the Instruction Accurate level for use in virtual platforms as a Virtualized Software Development environment is a key technology made publicly available through OVP.  Now available for SystemC platforms, the OVP CPU modeling capability is complimentary to SystemC’s TLM-2.0 platform technology.

All OVP CPU models now work with TLM-2.0 and include ARM, OpenCores OR1K, MIPS Technologies’ MIPS32® 4K®, 24K® and 34K® core families and the ARC 600 and 700 families.  Models and example bare metal platforms are available as open source from the OVP website, along with examples of each model being used in a SystemC TLM-2.0 platform.

John Aynsley of Doulos has been active in the SystemC community.  ”Part of the OSCI TLM-2.0 value proposition is that it makes the development of fast virtual platforms for software development easier to achieve. The alignment of OVP with the TLM-2.0 standard helps address one of the critical requirements for the successful deployment of virtual platforms, which is the ready availability of processor models.”

Since OVP was started in March 2008, there have been close to 10,000 downloads of the software and viewings of demonstration videos and presentations.  More than 500 copies of the simulator itself have been downloaded, confirming that design teams are interested in fast, free and easy-to-use virtual platforms.

Previously, OVP processor models had been available for use in OVP-based virtual platforms only.  This release of OVP tools includes the OVPsim simulator and a native OSCI TLM-2.0 interface.  OVP processor models in a SystemC TLM-2.0 simulation run benchmarks such as “Peakspeed” at 500-1,000 million instructions per second.

“MIPS customers have been asking for TLM-2.0 compatible models of the MIPS cores,” remarks Mark Throndson, director of marketing for MIPS Technologies.  “It’s great that Imperas is now providing these models through OVP.”

Notes Dave Von Bank, CEO of Posedge Software:  “That OVP has fast models is important, but making them work in SystemC platforms with TLM2.0 is essential.  It is fantastic that Imperas has made its industry-leading performing models now work with the new OSCI SystemC TLM-2.0 standard.”

“Imperas has responded quickly to the requests of the SystemC community to make available its models in this new industry standard,” affirms Lauro Rizzatti, general manger of EVE-USA.  “TLM-2.0 provides a new level of performance and interoperability for SystemC users.”

Imperas’ Davidmann has long been an outspoken critic of SystemC TLM’s lack of interoperability.  “With TLM-2.0, OSCI has made significant strides in interoperability, enabling models from different vendors to work together in a virtual platform.  In addition, features such as the Direct Memory Interface (DMI) have increased performance many times over, making TLM-2.0 a viable option for software virtual platforms.”

Open Virtual Platforms

The goal of OVP is to provide the infrastructure technology — open source and free, focused on multicore and speed — for embedded software development, and the infrastructure through the OVPworld.org website for this community to grow.  The technology helps to address problems embedded software developers have when modeling the system on chip (SoC) that hosts their software.  The OVP website (www.OVPworld.org) serves as the portal, with details about the technology, a discussion forum for the community, and links to download each component.

About Imperas

By blending hardware development, software programming technologies and design processes together, Imperas provides methodologies, technologies and products to enable the efficient programming, debug, and verification of Multiprocessor Systems-on-Chip (MP SoCs).  With an engineering base in the UK, Imperas distributes its products to customers worldwide.  For more information, visit www.imperas.com.

About OVP

Open Virtual Platforms (OVP) was initiated with the donation by Imperas of approximately $4 million of simulation infrastructure that enables chip designers and software developers to model platforms, systems on chips (SoCs), and multiprocessor SoCs (MP SoCs).  The OVP technology is available for free from www.OVPworld.org and has the support of electronic design automation (EDA) companies, end users and silicon intellectual property (IP) providers.  For more details, visit www.OVPworld.org.

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Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

Move Adds to Growing Open Virtual Platform Momentum

Thame, U.K. – August 18, 2008 — Imperas announced it has signed an agreement with MIPS Technologies, Inc. (NasdaqGS: MIPS), a leading provider of industry-standard architectures, processors and analog IP for digital consumer, home networking, wireless, communications and business applications, for the verification of a series of processor models that Imperas will create and make freely available.

Imperas models of MIPS® processor cores will be verified by MIPS Technologies under the MIPS-Verified^TM program, and will be available for free at the www.OVPworld.org website.  These verified MIPS models can be used to build virtual platforms that run up to 500-million instructions per second and can be used for efficient development of higher quality embedded software.

Jack Browne, vice president of marketing, Processor Business Group, MIPS Technologies, remarked: “Imperas will take the electronics industry forward with its visionary approach to virtual platforms and the easy accessibility of OVP. Verifying the compatibility and functionality of these high performance MIPS-Based^TM processor models and making them freely available with OVP enables our customers to develop high-quality software faster and more easily using virtual platform models of their SoCs and embedded systems.”

The MIPS core models and many other models used in developing virtual platforms are available now and downloadable free of charge at the OVP website: www.OVPworld.org. Other components available from OVP include application programming interfaces (APIs) for building a platform verification infrastructure and developing behavioral and processor models.  Model libraries of processors, behavioral components and peripherals are offered, along with platform templates, bare-metal platforms, and OVPsim, a reference simulator shipped as an executable.

“MIPS Technologies recognizes the importance of freely available models to seed the market for rapid growth and accelerate the design and programming of embedded systems on chip,” says Simon Davidmann, Imperas’ president and chief executive officer. “Compatibility and quality of models is essential when using virtual platforms to develop software and by having MIPS-Verified processor models available for free from OVP means developers can get higher quality software developed faster.  Verified models really help close the Software Gap.”

Open Virtual Platforms

The goal of OVP is to provide the infrastructure technology — open source and free, focused on multicore and speed — for embedded software development, and the infrastructure through the OVPworld.org website for this community to grow.  The technology helps to address problems embedded software developers have when modeling the system on chip (SoC) that hosts their software.

The OVP website (www.OVPworld.org) serves as the portal, with details about the technology, a discussion forum for the community, and links to download each component.

About Imperas

By blending hardware development, software programming technologies and design processes together, Imperas provides methodologies, technologies and products to enable the efficient programming, debug, and verification of Multiprocessor Systems-on-Chip (MP SoCs).  With an engineering base in the UK, Imperas distributes its products to customers worldwide.  For more information, visit:  www.imperas.com.

About OVP

Open Virtual Platforms (OVP) was initiated with the donation by Imperas of approximately $4 million of simulation infrastructure that enables chip designers and software developers to model platforms, systems on chips (SoCs), and multiprocessor SoCs (MP SoCs).  The OVP technology is available for free from www.OVPworld.org and has the support of electronic design automation (EDA) companies, end users and silicon intellectual property (IP) providers.  For more details, visit:  www.OVPworld.org.

About MIPS Technologies, Inc.

MIPS Technologies, Inc. (NasdaqGS: MIPS) is the world’s second largest semiconductor design IP company and the number one analog IP company worldwide.  With more than 250 customers around the globe, MIPS Technologies is the only company that provides a combined portfolio of processors, analog IP and software tools for the embedded market.  The company powers some of the world’s most popular products for the digital entertainment, home networking, wireless, and portable media markets-including broadband devices from Linksys, DTVs and digital consumer devices from Sony, DVD recordable devices from Pioneer, digital set-top boxes from Motorola, network routers from Cisco, 32-bit microcontrollers from Microchip Technology and laser printers from Hewlett-Packard.  Founded in 1998, MIPS Technologies is headquartered in Mountain View, Calif., with offices worldwide.  For more information, contact (650) 567-5000 or visit www.mips.com.

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MIPS and Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

Tensilica Move Adds to Growing Open Virtual Platform Momentum

Thame, U.K. – June 6, 2008 — Tensilica® Inc. has signed a partnership agreement with Imperas to allow fast functional, instruction accurate models of its popular Xtensa® and Diamond Standard processors to run on Open Virtual Platform (OVP) based virtual platforms.  Specifically, wrapper files enabling integration of the Tensilica processor models are now available for free download from the www.OVPworld.org website.  These models will run with Tensilica’s TurboXim^TM fast functional simulator, which simulates at speeds 40 to 80 times faster than a traditional instruction set simulator.

This expands OVP’s library of free downloadable components.  Imperas’s OVP wrappers for Tensilica cores use the built-in application programming interface (API) in the Tensilica simulation model for communication between the Tensilica processor model and the OVP platform.  While models of Tensilica’s Xtensa configurable processor are automatically generated to match the exact configuration, models of Diamond Standard Series processors are available as part of a free 15-day software development kit evaluation download at www.tensilica.com.

“Our agreement with OVP and Imperas will help expand the market,” affirms Chris Jones, Tensilica’s director of strategic alliances.  “Broadening the choices of ESL tools that our customers can use enables those designers to make better SOC architectural choices earlier in the design process.   Open source, non-proprietary tools, such as those available from OVP, become important components for the growth of multicore design.”

The wrapper file is available now and downloadable free of charge at the OVP website:  www.OVPworld.org.

Imperas Ltd. launched the OVP initiative in March 2008 with support from end users, intellectual property (IP) developers, service providers and tool suppliers.  “In the three months since the launch of OVP over 250 people have registered on the OVP discussion forum, and over 100 unique companies and institutions have downloaded nearly 1000 OVP files,” says Simon Davidmann, CEO of Imperas.  “This is an unprecedented launch in this industry, and this partnership with Tensilica is a significant addition to the OVP momentum.”

Other components available from OVP include APIs for building a platform verification infrastructure and developing behavioral and processor models.  Model libraries of processors, behavioral components and peripherals are offered, along with platform templates, and OVPsim, a reference simulator shipped as an executable.

Imperas will be in booth #467 during the 45 Design Automation Conference (DAC) June 9-12 at the Anaheim Convention Center in Anaheim, Calif.

Open Virtual Platforms

The goal of OVP is to provide the infrastructure technology — open source and free, focused on multicore and speed — for embedded software development, and the infrastructure through the OVPworld.org website for this community to grow.  The technology helps to address problems embedded software developers have when modeling the system on chip (SoC) that hosts their software.

The OVP website (www.OVPworld.org) serves as the portal, with details about the technology, a discussion forum for the community, and links to download each component.

About Imperas

Imperas is focused on delivering technology in the Electronic Design Automation (EDA) space.  By blending hardware and software technologies and design processes together, Imperas provides methodologies, technologies and products to enable the efficient programming, debug, and verification of Multiprocessor Systems-on-Chip (MPSoCs).  With an engineering base in the UK, Imperas distributes its products to customers worldwide.  For more information, visit:  www.imperas.com.

About OVP

Open Virtual Platforms (OVP) was initiated with the donation by Imperas of approximately $4 million of simulation infrastructure that enables chip designers and software developers to model platforms, systems on chips (SoCs), and multiprocessor SoCs (MPSoCs).  The OVP technology is available for free from www.OVPworld.org and has the support of electronic design automation (EDA) companies, end users and intellectual property (IP) providers.  For more details, visit:  www.OVPworld.org.

About Tensilica

Tensilica offers the broadest line of controller, CPU and specialty audio and video DSP processors on the market today, in both an off-the-shelf format via the Diamond Standard Series cores and with full designer configurability with the Xtensa processor family.  Tensilica’s low-power, benchmark-proven processors have been designed into high-volume products at industry leaders in the digital consumer, networking and telecommunications markets.  All Tensilica processor cores are complete with a matching software development tool environment, portfolio of system simulation models, and hardware implementation tool support.  For more information on Tensilica’s patented approach to the creation of application-specific building blocks for SOC design, visit www.tensilica.com.

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Imperas acknowledges trademarks or registered trademarks of other organizations for their respective products and services.