OVP Model of ARM Cortex-A9 MPx2 is at the Heart of the Cadence Zynq Virtual Platform

OXFORD, United Kingdom, October 26, 2011 – Imperas™, which is a member of the ARM Connected Community, has released its models of the Cortex-A9 MPCore and Cortex-A5 UP ARM processor cores, including the 1, 2, 3 and 4-core versions of the Cortex-A9 MPCore. Models of the Cortex-A9 MPCore and Cortex-A5 UP are now available from Open Virtual Platforms™ (OVP™), including example virtual platforms incorporating the cores and support for the cores in Imperas’ advanced software development tools.

These OVP Fast Processor Models are in use by customers, an example being the inclusion of the model of the Cortex-A9 MPx2 in the Cadence-developed Virtual Platform of the Xilinx Zynq-7000 Extensible Processing Platform (EPP). The Zynq-7000 EPP Virtual Platform was announced earlier today by Cadence and Xilinx and also discussed in a blog post.

Imperas earlier this week announced the interoperability of its OVP Fast Processor Models and advanced software Multiprocessor/Multicore Verification, Analysis and Profiling (M*VAP™) tools with the Cadence Virtual System Platform. Imperas also announced earlier this week the development of the OVP Fast Processor Model of the Xilinx MicroBlaze soft processor core. This model of the Xilinx MicroBlaze will be available with certain versions of the Zynq-7000 EPP Virtual Platform as an extension to the virtual platform.

“ARM’s Cortex processor cores are at the heart of leading edge SoCs and embedded systems,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “And the Imperas OVP Fast Processor Models are at the heart of the virtual platforms of these SoCs and systems.”

The OVP Fast Processor Models and example platforms are available from the Open Virtual Platforms website, www.OVPworld.org Cortex-A web page. The models of the ARM Cortex-A9 MPCore and Cortex-A5 UP, as well as models of the other ARM processors including the ARM7, ARM9, ARM10, ARM11, Cortex-A and Cortex-M families, work with the Imperas and OVP simulators, and have shown exceptionally fast simulation performance of hundreds of millions of instructions per second. The OVP Fast Processor Models include support for both the 32 and 16-bit instructions, as well as the MMU, MPU, TCM, VFP and NEON features.

Open Virtual Platforms, with over 75 Fast Processor Models, has become the de facto source for instruction accurate models of processor cores. All OVP Fast Processor Models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle. OVP processor models employ a state of the art just-in-time code morphing engine to achieve the simulation speed. Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the native TLM-2.0 interface available with all OVP models. The native TLM-2.0 interface enables multiple instantiations of the processor models in a single virtual platform, just as any other component would be instantiated. The OVP simulator can also be encapsulated within the Eclipse IDE, enabling easy use for software developers.

In addition to working with the OVP simulator OVPsim™, the OVP Fast Processor Models work with the Imperas Multiprocessor/Multicore/Multithread Software Development Kit (M*SDK™). These advanced tools for multicore software verification and analysis include key tools for software development on virtual platforms such as OS and CPU-aware tracing (instruction, function, task, event), hot spot profiling, code coverage and memory and cache analysis. The M*VAP™ tools utilize the Imperas SlipStreamer™ patent pending binary interception technology. SlipStreamer enables these analytical tools to operate without any modification or instrumentation of the software source code, i.e., the tools are completely non-intrusive.

Available OVP Fast Processor Models of ARM cores

The following specific models are available as open source from OVP:

ARM7TDMI, ARM720T, ARM7EJ-S

ARM920T, ARM922T, ARM926EJ-S, ARM940T, ARM946E, ARM966E-S, ARM968E-S

ARM1020E, ARM1022E, ARM1026EJ-S

ARM1136J-S, ARM1156T2-S

Cortex-A5 UP, Cortex-A8, Cortex-A9 UP, Cortex-A9 MPCore

Cortex-M3, Cortex-M4

About Imperas (www.Imperas.com)

For more information about Imperas, please go to the Imperas website.

About the Open Virtual Platforms Initiative (www.OVPworld.org)

For more information about OVP, please go to the About OVP page on the OVP website. Detailed quotations regarding OVP are available from www.OVPworld.org/quotes.

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Imperas, Open Virtual Platforms, OVP, OVPsim,,SlipStreamer, M*SDK and M*VAP are trademarks of Imperas Software Limited. Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

Imperas today announced its relationship with Xilinx, Inc. and introduced its new model of the Xilinx MicroBlaze embedded processor core.

The free and open source OVP Fast Processor Model and example virtual platforms including the MicroBlaze core are available from the Open Virtual Platforms website, www.OVPworld.org/XILINX.

A press release was released today discussing the availability. To read the full press release please browse the News Press Releases section of this site.

To find out more about OVP models, virtual platforms and operating system support, please visit the models pages.
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Imperas has been working with Cadence on the integration and validation of the Imperas professional tools and the OVP Fast Processor Models within the Cadence Virtual System Platform product suite.

The availability was announced today and enables Cadence VSP customers to access the OVP library of ARC, ARM, MIPS, Power, Renesas, and openCores Fast Processor Models.

“High performance processor models are an important part of our virtual prototype solution,” said Michał Siwiński, group director of product marketing, System & Software Realization Group, Cadence. “The Open Virtual Platforms library of fast processor core models, together with Imperas tools for software analysis, complement the Virtual System Platform to provide an effective solution for system and software development.”

To read the full press release, please visit the News Press Releases section of this site.

OVP Fast Processor Models Being Used For Automotive Electronics Software Testing

OXFORD, United Kingdom, October 12, 2011 – Imperas™ today announced that Imperas and Renesas Electronics Corporation (TSE: 6723) have been cooperating on the verification of the Open Virtual Platforms™ (OVP™) Fast Processor Models of the Renesas V850 cores. These models are being used with the OVPsim™ virtual platform simulator, usually for software testing of automotive electronics applications. Users include NIRA Dynamics, a provider of tire pressure sensor systems.

Renesas and Imperas collaborated on the verification plan for the OVP Fast Processor Models™ of the V850 Family of CPU cores, and Renesas has supported Imperas with technology to assist in the verification of the OVP Fast Processor Models. “Imperas with its OVP Fast Processor Models is addressing key issues in software development for embedded systems,” said Hirohiko Ono, senior manager of the MCU Tools Marketing Department for Renesas Electronics Corporation. “We are happy to work with Imperas to ensure that high quality models are easily available to our worldwide customers, helping them to develop and test software faster and more easily using virtual platforms.”

“In the automotive electronics industry we always need to do more testing of our embedded systems software,” said Peter Lindskog, head of development for NIRA Dynamics AB, a subsidiary of Audi Electronics Venture GmbH. “Finding that the simulation performance of the Imperas/OVP V850 model was 50 times faster than our previous solution opens up new possibilities for us in software testing, and enables us to increase our test coverage and product reliability,”

All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle. OVP processor models work with the OVPsim and Imperas simulators, which employ a state of the art just-in-time code morphing engine to achieve the simulation speed. Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM2 based virtual platforms using the native TLM2 interface available with all OVP models. The native TLM2 interface enables multiple instantiations of the processor models in a single virtual platform, just as any other component would be instantiated. The OVP simulator can also be encapsulated within the Eclipse IDE, enabling easy use for software developers.

“Imperas is very excited to be working with Renesas, the leader in automotive MCUs,” said Simon Davidmann, president and CEO, Imperas. “Cooperation between processor vendors and independent tool developers is critical to providing optimized flows for embedded software development.”

About Imperas (www.Imperas.com)

For more information about Imperas, please go to the Imperas website.

About the Open Virtual Platforms Initiative (www.OVPworld.org)

For more information about OVP, please go to the About OVP page on the OVP website. Detailed quotations regarding OVP are available from http://www.ovpworld.org/quotes.

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Imperas, Open Virtual Platforms, OVP and OVP Fast Processor Models are trademarks of Imperas Software Limited. Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

After much testing the free open source OVP Fast Processor Models of the ARM Cortex-A8, Cortex-A9, and Cortex-M4 cores are available from the OVP website.

This new OVP release includes the core source code and includes example virtual platforms utilizing the models and support for the cores in Imperas’ advanced software development tools. There are C and SystemC TLM2.0 platforms that run bare metal applications and also full platforms that boot Linux.

A press release by Imperas was released today discussing the availability.

To read the full Imperas/OVP press release please browse the Press Releases section of this site.

To download the OVP ARM Cortex-A and Cortex-M models and platforms and view their source, or to watch videos of OVP ARM models running at 100s of MIPS, please visit the download pages.

To find out more about OVP models, please visit the models pages.

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Aldec, Cadence and Proximus have integrated OVP models and technology with their products and they will all have demos showing the integrations available for users to watch at the upcoming Design Automation Conference (DAC) in San Diego.

Imperas can also be seen at DAC presenting at the North American SystemC User Group (NASCUG) on Monday June 6, and participating in a pavilion panel session on embedded operating systems on Tuesday June 7.

To read the full Imperas/OVP press release please browse the Press Releases section of this site.

Imperas has now released a new example reference platform using the OVP ARM Cortex-M3 core model running the Micrium μC/OS II RTOS.

If you want to see the OS running, look at the source of the platform or the example application, visit the ARM Cortex-M download pages on the OVP site.

To read the full Imperas/OVP press release please browse the Press Releases section of this site.

Today Imperas announced that MIPS Technologies is licensing a version of their OVP compliant  simulator to provide to MIPS partners and licensees. MIPS confirmed that their lead customers have already taken delivery of the software.

Simon Davidmann, president and CEO, Imperas, and founding director of the OVP initiative said  “During these last two years, we’ve seen OVP grow from its inception to being the industry’s leading independent supplier of instruction accurate models of processor cores. Having these two parallel efforts, the broad acceptance of OVP and our cooperative relationship with MIPS Technologies, come together to provide technology to MIPS licensees building embedded systems is a proud and exciting milestone for us.”

To read the full Imperas/OVP press release please browse the Press Releases section of this site.

After much testing the free open source models of the ARM Cortex-M range of cores are available from the OVP website.

The initial models include the ARM Cortex-M3 and includes example virtual platforms utilizing the core models and support for the cores in Imperas’ advanced software development tools.

A press release was released today discussing the availability.

To read the full Imperas/OVP press release please browse the Press Releases section of this site.

To download the ARM Cortex-M models and platforms and view their source, or to watch videos of ARM models running at 100s of MIPS, please visit the download pages.

To find out more about OVP models, please visit the models pages.

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After much testing the free open source models of the MIPS32 1074K CPS multicore cores are available from the OVP website.

These models of the MIPS32® 1074Kf™ CPS and 1074Kc™ CPS processor cores from MIPS Technologies, Inc. include example virtual platforms utilizing these cores and support for the cores in Imperas’ advanced software development tools.

MIPS Technologies has verified the functionality of these models under the MIPS-Verified™ program.

A press release was released today discussing the availability.

These vendor verified OVP models are being made available on the same day that MIPS introduces the new cores.

To read the full Imperas/OVP press release please browse the Press Releases section of this site.

To read the MIPS press release introducing the 1074K family please browse the MIPS site.

To download the MIPS32 1074K models and platforms and view their source, or to watch videos of MIPS models running at 100s of MIPS, please visit the download pages.

To find out more about OVP models, please visit the models pages.

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