About Imperas - Focus: Multi-Core Software Simplified
The challenges in designing a modern System on Chip have stretched the traditional EDA industry to the point that a new generation of technologies are needed to address the ‘above RTL/C’ issues. Gary Smith while at Dataquest described this new area as ESL (Electronic System Level).
One of the biggest changes is the move to multi-core software. Already software development is the biggest cost and concurrency will bring productivity spiralling down.
To effectively develop software for multi-core devices new tools are needed. Key to these new tools are ultra fast models of processors, peripherals, behavioral components, and platforms that can be put together into fast Virtual Platform and Virtual Prototype simulations that will run up to a 1,000 Million Instructions per Second. Often for embedded devices Imperas technology can execute software running faster than real time.
Much of this simulation technology is now available in the Open Virtual Platforms initiative. Please visit the OVP web site to download, evalute, and use this fast simulation technology.
Getting fast software simulation is only the start of the solution for multi-core devices – it soon becomes essential to have development/debug tools that understand concurrency and can enable debug of 10’s or 100’s of processors running software – all fully controllable and observable. MP debug becomes essential in the new multicore software development environments.
And then – when all that is running – really what is needed is advanced verification technologies to find bugs while software is running – rather than just report errors after the fact.
At Imperas we are dedicated to make multi-core software development easy and efficient.
If you are facing the challenges of getting software to run on complex multi-core platforms – then contact us at info@imperas.com
Imperas History
Imperas was originally founded by the developers of SystemVerilog to tackle the problem of multi-core software development and the challenges of getting complex parallel programs onto multi-core platforms.
It became apparent that Imperas was ahead of its time and that the most pressing challenges the software developers were having was how to get their parallel software up and running on their new multi-core platforms.
Imperas changed focus and is now dedicated to providing the best solutions for embedded software development using virtual platforms.
Some Imperas milestones include:
- Feb 2010 new NEC v850 family of models available for Imperas and OVP users
- Jan 2010 4 new MIPS models available for Imperas and OVP users including state of the art 4 core 8 thread 1004K
- Jul 2009 12 new ARM models available for Imperas and OVP users
- Jun 2009 1 year anniversary of OVP - over 1,000 users, 20+ processor models, 27 supporting companies
- May 2009 ARC Relationship, release of ARC6xx/7xx processors and verification of ARC605 model
- Feb 2009 Release of fastest SystemC TLM 2.0 processor models
- Aug 2008 MIPS partnership to verify OVP models of MIPS processors
- Jun 2008 Tensilica partnership
- Mar 2008 OVP initiation, publicity, first users, and free open source models
- Dec 2007 Management Buy Out from investors - New focus on simulation, debug, verification of multicore systems and software
- Jan 2005 Initially formed and VC funded to optimize deployment of software on heterogenous multicore hosts - too early in the market - everybody said challenge was just getting software to run on multicore - so a refocused company was created
For more information, please visit the news section of the site where more information is provided in the press releases and news articles.